liz/flipperzero-firmware
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

[FL-1528] SubGhz: dma send (#579)

Browse Source 
* Gui: input injection in screen stream
* Cli: expose ASCII table in public header
* SubGhz: dma output draft
* SubGhz: output initialization cleanup
* SubGhz: update dma send routine, add subghz_tx cli command.
* SubGhz: proper register address for DMA
* SubGhz: proper, fully working dma+tim2 configuration
* SubGhz: transmit PT with cli.
* Drivers: fix invalid size in CC1101 PA_TABLE loading routine.
* Interrupts: configurable DMA isrs.
* F5: backport fixes.
* SubGhz: free buffer after use
* SubGhz: use sleep instead of reset at the end
* SubGhz: async tx repeat with circular DMA
* SubGhz: disable dma channel on complete, adjust PT send timings
* SubGhz: backport function singature change to F5
* SubGhz: add tx debug gpio
This commit is contained in:
あく
2021-07-15 16:54:11 +03:00
committed by GitHub
parent 5df346aebe
commit 851a44dc59
17 changed files with 485 additions and 85 deletions
Download Patch File Download Diff File Expand all files Collapse all files

197
firmware/targets/f6/api-hal/api-hal-subghz.c
View File

@@ -9,6 +9,8 @@
#include <cc1101.h>
#include <stdio.h>
static volatile SubGhzState api_hal_subghz_state = SubGhzStateInit;
static const uint8_t api_hal_subghz_preset_ook_async_regs[][2] = {
/* Base setting */
{ CC1101_IOCFG0, 0x0D }, // GD0 as async serial data output/input
@@ -24,7 +26,7 @@ static const uint8_t api_hal_subghz_preset_ook_async_regs[][2] = {
};
static const uint8_t api_hal_subghz_preset_ook_async_patable[8] = {
0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
static const uint8_t api_hal_subghz_preset_mp_regs[][2] = {
@@ -63,7 +65,7 @@ static const uint8_t api_hal_subghz_preset_mp_regs[][2] = {
};
static const uint8_t api_hal_subghz_preset_mp_patable[8] = {
0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
static const uint8_t api_hal_subghz_preset_2fsk_packet_regs[][2] = {
@@ -85,9 +87,19 @@ static const uint8_t api_hal_subghz_preset_2fsk_packet_patable[8] = {
};
void api_hal_subghz_init() {
furi_assert(api_hal_subghz_state == SubGhzStateInit);
api_hal_subghz_state = SubGhzStateIdle;
const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
// Reset and shutdown
#ifdef API_HAL_SUBGHZ_TX_GPIO
hal_gpio_init(&API_HAL_SUBGHZ_TX_GPIO, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
#endif
// Reset
hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
cc1101_reset(device);
cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHighImpedance);
// Prepare GD0 for power on self test
hal_gpio_init(&gpio_cc1101_g0, GpioModeInput, GpioPullNo, GpioSpeedLow);
@@ -108,8 +120,23 @@ void api_hal_subghz_init() {
hal_gpio_init(&gpio_rf_sw_0, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
cc1101_write_reg(device, CC1101_IOCFG2, CC1101IocfgHW);
// Turn off oscillator
// Go to sleep
cc1101_shutdown(device);
api_hal_spi_device_return(device);
}
void api_hal_subghz_sleep() {
furi_assert(api_hal_subghz_state == SubGhzStateIdle);
const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
cc1101_switch_to_idle(device);
cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHighImpedance);
hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
cc1101_shutdown(device);
api_hal_spi_device_return(device);
}
@@ -189,7 +216,10 @@ void api_hal_subghz_shutdown() {
void api_hal_subghz_reset() {
const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
cc1101_switch_to_idle(device);
cc1101_reset(device);
cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHighImpedance);
api_hal_spi_device_return(device);
}
@@ -207,7 +237,6 @@ void api_hal_subghz_rx() {
void api_hal_subghz_tx() {
const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
cc1101_switch_to_idle(device);
cc1101_switch_to_tx(device);
api_hal_spi_device_return(device);
}
@@ -281,11 +310,6 @@ volatile uint32_t api_hal_subghz_capture_delta_duration = 0;
volatile ApiHalSubGhzCaptureCallback api_hal_subghz_capture_callback = NULL;
volatile void* api_hal_subghz_capture_callback_context = NULL;
void api_hal_subghz_set_capture_callback(ApiHalSubGhzCaptureCallback callback, void* context) {
api_hal_subghz_capture_callback = callback;
api_hal_subghz_capture_callback_context = context;
}
static void api_hal_subghz_capture_ISR() {
// Channel 1
if(LL_TIM_IsActiveFlag_CC1(TIM2)) {
@@ -308,10 +332,14 @@ static void api_hal_subghz_capture_ISR() {
}
}
void api_hal_subghz_enable_capture() {
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
void api_hal_subghz_set_async_rx_callback(ApiHalSubGhzCaptureCallback callback, void* context) {
api_hal_subghz_capture_callback = callback;
api_hal_subghz_capture_callback_context = context;
}
void api_hal_subghz_start_async_rx() {
furi_assert(api_hal_subghz_state == SubGhzStateIdle);
api_hal_subghz_state = SubGhzStateAsyncRx;
hal_gpio_init_ex(&gpio_cc1101_g0, GpioModeAltFunctionPushPull, GpioPullNo, GpioSpeedLow, GpioAltFn1TIM2);
@@ -323,24 +351,27 @@ void api_hal_subghz_enable_capture() {
TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
LL_TIM_Init(TIM2, &TIM_InitStruct);
// Timer: advanced and channel
// Timer: advanced
LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
LL_TIM_DisableARRPreload(TIM2);
LL_TIM_SetTriggerInput(TIM2, LL_TIM_TS_TI2FP2);
LL_TIM_SetSlaveMode(TIM2, LL_TIM_SLAVEMODE_RESET);
LL_TIM_CC_DisableChannel(TIM2, LL_TIM_CHANNEL_CH2);
LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_FILTER_FDIV1);
LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_POLARITY_RISING);
LL_TIM_DisableIT_TRIG(TIM2);
LL_TIM_DisableDMAReq_TRIG(TIM2);
LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
LL_TIM_EnableMasterSlaveMode(TIM2);
LL_TIM_DisableDMAReq_TRIG(TIM2);
LL_TIM_DisableIT_TRIG(TIM2);
// Timer: channel 1 indirect
LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_INDIRECTTI);
LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);
LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_FILTER_FDIV1);
LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_POLARITY_FALLING);
LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_FILTER_FDIV1);
// Timer: channel 2 direct
LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ACTIVEINPUT_DIRECTTI);
LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ICPSC_DIV1);
LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_POLARITY_RISING);
LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_FILTER_FDIV1);
// ISR setup
api_hal_interrupt_set_timer_isr(TIM2, api_hal_subghz_capture_ISR);
@@ -356,10 +387,132 @@ void api_hal_subghz_enable_capture() {
// Start timer
LL_TIM_SetCounter(TIM2, 0);
LL_TIM_EnableCounter(TIM2);
// Switch to RX
api_hal_subghz_rx();
}
void api_hal_subghz_disable_capture() {
void api_hal_subghz_stop_async_rx() {
furi_assert(api_hal_subghz_state == SubGhzStateAsyncRx);
api_hal_subghz_state = SubGhzStateIdle;
// Shutdown radio
api_hal_subghz_idle();
LL_TIM_DeInit(TIM2);
api_hal_interrupt_set_timer_isr(TIM2, NULL);
hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
}
volatile size_t api_hal_subghz_tx_repeat = 0;
static void api_hal_subghz_tx_dma_isr() {
if (LL_DMA_IsActiveFlag_TC1(DMA1)) {
LL_DMA_ClearFlag_TC1(DMA1);
furi_assert(api_hal_subghz_state == SubGhzStateAsyncTx);
if (--api_hal_subghz_tx_repeat == 0) {
api_hal_subghz_state = SubGhzStateAsyncTxLast;
LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_1);
}
}
}
static void api_hal_subghz_tx_timer_isr() {
if(LL_TIM_IsActiveFlag_UPDATE(TIM2)) {
LL_TIM_ClearFlag_UPDATE(TIM2);
if (api_hal_subghz_state == SubGhzStateAsyncTxLast) {
LL_TIM_DisableCounter(TIM2);
api_hal_subghz_state = SubGhzStateAsyncTxEnd;
}
}
}
void api_hal_subghz_start_async_tx(uint32_t* buffer, size_t buffer_size, size_t repeat) {
furi_assert(api_hal_subghz_state == SubGhzStateIdle);
api_hal_subghz_state = SubGhzStateAsyncTx;
api_hal_subghz_tx_repeat = repeat;
// Connect CC1101_GD0 to TIM2 as output
hal_gpio_init_ex(&gpio_cc1101_g0, GpioModeAltFunctionPushPull, GpioPullDown, GpioSpeedLow, GpioAltFn1TIM2);
// Configure DMA
LL_DMA_InitTypeDef dma_config = {0};
dma_config.PeriphOrM2MSrcAddress = (uint32_t)&(TIM2->ARR);
dma_config.MemoryOrM2MDstAddress = (uint32_t)buffer;
dma_config.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
dma_config.Mode = LL_DMA_MODE_CIRCULAR;
dma_config.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
dma_config.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
dma_config.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_WORD;
dma_config.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_WORD;
dma_config.NbData = buffer_size / sizeof(uint32_t);
dma_config.PeriphRequest = LL_DMAMUX_REQ_TIM2_UP;
dma_config.Priority = LL_DMA_MODE_NORMAL;
LL_DMA_Init(DMA1, LL_DMA_CHANNEL_1, &dma_config);
api_hal_interrupt_set_dma_channel_isr(DMA1, LL_DMA_CHANNEL_1, api_hal_subghz_tx_dma_isr);
LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_1);
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_1);
// Configure TIM2
LL_TIM_InitTypeDef TIM_InitStruct = {0};
TIM_InitStruct.Prescaler = 64-1;
TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
TIM_InitStruct.Autoreload = 1000;
TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
LL_TIM_Init(TIM2, &TIM_InitStruct);
LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
LL_TIM_EnableARRPreload(TIM2);
// Configure TIM2 CH2
LL_TIM_OC_InitTypeDef TIM_OC_InitStruct = {0};
TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_TOGGLE;
TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_DISABLE;
TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_DISABLE;
TIM_OC_InitStruct.CompareValue = 0;
TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH;
LL_TIM_OC_Init(TIM2, LL_TIM_CHANNEL_CH2, &TIM_OC_InitStruct);
LL_TIM_OC_DisableFast(TIM2, LL_TIM_CHANNEL_CH2);
LL_TIM_DisableMasterSlaveMode(TIM2);
api_hal_interrupt_set_timer_isr(TIM2, api_hal_subghz_tx_timer_isr);
LL_TIM_EnableIT_UPDATE(TIM2);
LL_TIM_EnableDMAReq_UPDATE(TIM2);
LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH2);
// Start counter
LL_TIM_GenerateEvent_UPDATE(TIM2);
#ifdef API_HAL_SUBGHZ_TX_GPIO
hal_gpio_write(&API_HAL_SUBGHZ_TX_GPIO, true);
#endif
api_hal_subghz_tx();
LL_TIM_SetCounter(TIM2, 0);
LL_TIM_EnableCounter(TIM2);
}
void api_hal_subghz_wait_async_tx() {
while(api_hal_subghz_state != SubGhzStateAsyncTxEnd) osDelay(1);
}
void api_hal_subghz_stop_async_tx() {
furi_assert(api_hal_subghz_state == SubGhzStateAsyncTxEnd);
api_hal_subghz_state = SubGhzStateIdle;
// Shutdown radio
api_hal_subghz_idle();
#ifdef API_HAL_SUBGHZ_TX_GPIO
hal_gpio_write(&API_HAL_SUBGHZ_TX_GPIO, false);
#endif
// Deinitialize Timer
LL_TIM_DeInit(TIM2);
api_hal_interrupt_set_timer_isr(TIM2, NULL);
// Deinitialize DMA
LL_DMA_DeInit(DMA1, LL_DMA_CHANNEL_1);
api_hal_interrupt_set_dma_channel_isr(DMA1, LL_DMA_CHANNEL_1, NULL);
// Deinitialize GPIO
hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
}