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FL-501 CSS for both clock domains (#264)

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* CSS for both clock domains. Stale LSE detection and RTC domain reset on start.
* migrate to f4

Co-authored-by: aanper <mail@s3f.ru>
This commit is contained in:
あく
2020-12-11 15:34:17 +03:00
committed by GitHub
parent df27d775bf
commit 46537f4470
15 changed files with 114 additions and 7 deletions
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firmware/targets/f3/Src/stm32wbxx_it.c
+29
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@@ -59,6 +59,7 @@
extern PCD_HandleTypeDef hpcd_USB_FS;
extern ADC_HandleTypeDef hadc1;
extern COMP_HandleTypeDef hcomp1;
extern RTC_HandleTypeDef hrtc;
extern TIM_HandleTypeDef htim1;
extern TIM_HandleTypeDef htim2;
extern TIM_HandleTypeDef htim17;
@@ -166,6 +167,34 @@ void DebugMon_Handler(void)
/* please refer to the startup file (startup_stm32wbxx.s). */
/******************************************************************************/
/**
* @brief This function handles RTC tamper and time stamp, CSS on LSE interrupts through EXTI line 18.
*/
void TAMP_STAMP_LSECSS_IRQHandler(void)
{
/* USER CODE BEGIN TAMP_STAMP_LSECSS_IRQn 0 */
HAL_RCC_CSSCallback();
/* USER CODE END TAMP_STAMP_LSECSS_IRQn 0 */
/* USER CODE BEGIN TAMP_STAMP_LSECSS_IRQn 1 */
/* USER CODE END TAMP_STAMP_LSECSS_IRQn 1 */
}
/**
* @brief This function handles RCC global interrupt.
*/
void RCC_IRQHandler(void)
{
/* USER CODE BEGIN RCC_IRQn 0 */
if (!LL_RCC_LSE_IsReady()) {
HAL_RCC_CSSCallback();
}
/* USER CODE END RCC_IRQn 0 */
/* USER CODE BEGIN RCC_IRQn 1 */
/* USER CODE END RCC_IRQn 1 */
}
/**
* @brief This function handles EXTI line1 interrupt.
*/